Introduction to methods for solving the noise problem of PCB circuit boards

　　Solving the noise problem of PCB circuit boards is a systematic engineering that requires comprehensive control from the design source to layout and wiring.

　　1、 Suppression of power supply noise (power supply integrity)

　　Optimize power distribution network

　　Use low impedance power plane: Use a complete power/ground plane as much as possible to provide a low impedance path for transient currents and reduce voltage fluctuations.

　　Reasonable power division: Divide noise sensitive analog power supplies, digital power supplies, high-speed core power supplies, etc. reasonably to avoid common impedance coupling, and use magnetic beads or zero ohm resistors for single point connection at the required connection points.

　　Effective deployment of decoupling capacitors

　　Layered configuration: Adopting a hierarchical structure of "large capacity energy storage (10-100 μ F tantalum capacitors)+intermediate frequency decoupling (0.1 μ F ceramic capacitors)+high-frequency decoupling (0.01 μ F or less, placed near the chip pins)", covering all frequency band noise.

　　Minimize circuit inductance: Place decoupling capacitors as close as possible to the chip power pins, use short and wide wiring, and form a small current loop with the ground plane.

　　Use a linear regulator or a low dropout regulator

　　In circuits that are extremely sensitive to noise, such as analog front-end and high-precision ADC/DAC, use LDO with high ripple suppression ratio instead of switching power supply to filter out high-frequency switching noise.

　　2、 Suppression of signal noise and crosstalk (signal integrity)

　　Control the impedance of the transmission line and maintain continuity

　　Impedance matching (source series or terminal parallel matching) is performed on high-speed signals to prevent ringing and overshoot caused by signal reflection.

　　Avoid factors such as sudden changes in wiring width, excessive interlayer hole changes, and right angle wiring that can cause impedance discontinuity.

　　Provide a clear signal return path

　　Ensuring a complete and undivided ground plane beneath the high-speed signal line is one of the key measures. The return current will flow closely to the ground plane below the signal line, with a small loop area and low radiation and inductance.

　　When changing layers of the signal line, place a grounding via near the via to provide a short interlayer switching path for the return current.

　　Increase spacing and reduce parallel routing

　　Following the 3W rule: The center to center distance between adjacent signal lines should be at least 3 times the line width, which can effectively reduce 70% of electric field coupling.

　　For critical signals such as clocks and differential pairs, use ground isolation or increase the distance between them and other signals.

　　3、 Solution to ground noise ("dirty ground")

　　Properly handling the 'ground'

　　Digital ground and analog ground separation: Isolation is achieved through physical segmentation, and then a single point connection is made at the power inlet or below key chips such as ADCs to prevent digital noise current from contaminating the analog ground.

　　Ensure the integrity of the ground plane: avoid cutting signal lines randomly on the ground plane and maintain low impedance of the ground plane.

　　Small grounding loop

　　Avoid forming large ground loops in system design, especially in interface and shielding design. Use common mode choke and appropriate grounding strategy.

　　4、 Layout and structural optimization

　　Functional zoning layout

　　Divide the board into functional areas: analog area, digital area, high-frequency area, and power area. Leave isolation zones or physical partitions between each area, and arrange them in a straight line according to the signal flow direction to avoid crossing.

　　Placement of key components

　　Crystal oscillator and clock driver: placed close to the relevant chips and surrounded by grounded copper foil, ensuring a complete ground plane below and away from sensitive circuits and interfaces.

　　Switching power supply and inductor: Keep away from analog and small signal areas, and add shielding covers if necessary.

　　5、 Filtering and shielding

　　Use a filter

　　Use π - or LC filters composed of magnetic beads, inductors, and capacitors at the power inlet, noise sensitive device power pins, and all external interfaces (I/O, cable connections) to filter out noise entering and exiting the circuit board.

　　block

　　Partial shielding: For specific strong noise sources on the board (such as DC-DC modules, crystal oscillators) or extremely sensitive circuits (such as RF front-end), a metal shielding cover is used for isolation.

　　Overall shielding: For high demand products, place the entire PCB inside a shielding shell.

　　6、 Other general measures

　　Reduce signal edge rate

　　On the premise of meeting the timing requirements, connect a small resistor in series at the driving end or use a driver with adjustable output strength to reduce the rise/fall time of the signal, thereby reducing high-frequency harmonic components.

　　Use copper paving with caution

　　Avoid randomly laying "dead copper" (copper foil that is not connected to any network) around or above high-speed signal lines, as it may become antenna or coupling noise. If copper is laid, it must be well grounded.

　　Summarize the core idea:

　　The core of solving PCB noise problems lies in "controlling current paths" and "managing electromagnetic fields".

　　Provide short, direct, and low impedance paths for all signals (including return currents).

　　By isolating, spacing, and shielding, the coupling and propagation of noise energy are prevented.

　　Filter out noise at the source or channel before it enters sensitive areas.

　　A successful low-noise design is the perfect combination of electrical principles and physical layout, from system planning, component selection to careful consideration of every wiring.